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Certain CPUs support a number of low power states distinguished by their ability to retain status, their different power requirements and their wakeup time. Moving to one of these low power retention states is a non-systemwide power transition that can be wholly managed by the base port part of the kernel framework. In fact, transitions in and out of these low power retention states should be transparent to the rest of the system. If it is likely that a transition to a retention state may have an impact on other parts of the system at a given time then the base port code should not move the CPU to that state at that time, even if the opportunity presents itself. Let s consider the actions needed to move the CPU to a low power retention state. I ve said that the transition will happen in the power controller s platform-speci c CpuIdle() function. To guarantee the maximum uninterrupted idle time, some events need to be disabled during that period. The best example of such an event is the system tick the periodic timed interrupt that is the basis for all timing in EKA2, and is provided by a hardware timer. This is commonly known as idle tick suppression.

In Figure 8-5 note that the global navigation incorporates the color palette of the respective categories. It would be foolish consistency to insist that the color schemes be the same. However, the global navigation is consistent and each page is consistent with the other pages in the same category.

The idle time can be predicted as the time until the next timer in the system is due to expire The CpuIdle() implementation can examine the nanokernel timer queue (NTimerQ) which provides this information The power framework already has an API to return the number of system ticks before the next NTimer expiration, the function IdleTime(), which is a member of the NTimerQ class The CpuIdle() implementation can now suppress the system tick for that period, and program the hardware timer to skip the required number of ticks When the hardware timer nally wakes the CPU, CpuIdle() can simply adjust the system tick count and reset the hardware timer to produce the regular ticks again To adjust the system tick count, CpuIdle() may use the function Advance(), which is a member of the NTimerQ class, passing it the number of suppressed ticks.

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The CPU may wake up as a result of an event rather than the expiration of the hardware timer In this case, the implementation of CpuIdle() needs to read the hardware timer, work out the number of integral system ticks suppressed and adjust the system tick count It must also reprogram the hardware timer to generate the next (and subsequent) system ticks Sometimes waking up from a retention state can take longer than several system ticks In that case, CpuIdle() should program the hardware timer to wake the CPU up at a time given by the next NTimer expiration minus the number of ticks it takes to wake up from that state This waking up from a retention state happens inside the null thread this means that the post amble needed to restore the status should be kept as short as possible.

Both preamble and post-amble routines should be executed with interrupts disabled, to stop them from being preempted It often happens that while the CPU is in the retention state, it is not able to perform the periodic refreshing that SDRAM needs In this case, the SDRAM must be placed in self-refresh mode before going into the retention state, with the CPU reassuming control of refreshing it after waking up The choice of low power retention state is connected with the current status of the phone s power resources The idle transition routine must have the ability to inspect the state of relevant resources, by interrogating the resource manager This interface also allows the state of resources to be modi ed as needed The CPU is moved to a low power retention state by a wait-forinterrupt type instruction, which will suspend instruction execution until an enabled hardware event occurs.